Course introduces the principles and practices of digital logic design. Student will learn about number systems, Boolean algebra, sum-of-product equations, minterms, Karnaugh maps, optimization, combinational circuit design, sequential circuit design, datapath components, and physical implementation. Students will have the opportunity to design and implement digital circuits using software.
Athena Title
Fundamentals of Logic Design
Equivalent Courses
Not open to students with credit in CSEE 2220E, CSEE 2220H
Prerequisite
CSEE 2210 or ECSE 1100 or ECSE 1100E or ESCE 1100H or ELEE 1030
Semester Course Offered
Offered every year.
Grading System
A - F (Traditional)
Student Learning Outcomes
By the end of this course, students should have obtained knowledge on logic functions and Boolean algebra.
By the end of this course, students should have learned how to apply formal design methods (minimization methods), the Karnaugh Table, and the Quine-McCluskey method.
By the end of this course, students should have gained the ability to formalize a problem and convert it into a logic expression and then into a circuit on the gate level.
By the end of this course, students should have obtained an overview how a gate-level circuit can be realized using integrated circuits and programmable logic.
Topical Outline
Introduction: Digital systems and number systems
Components of digital systems, basic logic functions
Boolean algebra: Terminology and properties, DeMorgan’s law
Boolean functions: Different representation of Boolean functions including sentence, truth tables, equations, and circuits; Conversion between different representation
Canonical representations and Standard form of Boolean functions; Minterms, sum-of-minterms, and compact sum-of-minterms representation
Combinational logic design process
Universal logic gates
Multiplexers and decoders
Combinational logic optimization and tradeoffs
Simplification of Boolean expressions; The Karnaugh map method; Algebraic 2-level simplification; Don’t care input combinations
Sequential logic; SR Latch, D Latch, D-Flip Flop, and registers
Timing diagram; State diagrams/finite state machine; Formal design of sequential circuits
